Indian Institute of Technology, Delhi: Anshul Kumar's "Pipelined Processor Design: Datapath"
Watch this lecture, which explains how to design a pipelined MIPS processor. The previous video introduced pipelining as a way to increase performance. It showed how hazards can limit the performance improvement of a pipeline datapath. This video lecture completes the design of a pipeline datapath. Ignoring hazards, the lecturer designs a control for the pipeline, integrates all the components including the control with the pipeline, and then considers the behavior with respect to hazards.
Last modified: Monday, April 25, 2016, 2:50 PM